Google TPU Sales to Meta Signal Shift in AI Chip Market

700 tokens per second. That is the speed recorded for a single user running a massive 2.8 trillion parameter model on Google's latest hardware, a figure that highlights the growing competitiveness of alternatives to the dominant AI chip market. The performance was achieved on the seventh-generation Ironwood TPU, a custom silicon unit designed by Google for artificial intelligence workloads. This benchmark comes from Inferact, a startup that helped build the new software stack, and it significantly outpaces the 452 tokens per second recorded on Nvidia's GB200 chips during similar tests.

The milestone was made possible by a new native version of the SGLang inference engine, which now runs directly on PyTorch. Previously, developers had to use Google's JAX framework to utilize TPUs, a process that required significant code rewrites. The new SGLang-TorchTPU integration allows the hardware to serve as a native option for PyTorch users without major structural changes. Meta confirmed that this version is already running in production environments, marking a significant step in the adoption of Google's silicon by one of the world's largest technology companies.

Zongwei Zhou, the PyTorch-TPU lead at Meta, described the achievement as the result of a close three-way collaboration between Meta, Google, and the SGLang team. His team works at RadixArk, a startup founded by the creators of the SGLang engine. Zhou noted that the new setup provides Meta with a remarkably mature serving stack that is fully native to the PyTorch ecosystem. This development aligns with a broader strategy to ensure that the company's AI infrastructure is not constrained by a single hardware architecture.

Jana van Greunen, director of PyTorch engineering at Meta, emphasized that the company needs the flexibility to deploy workloads across different platforms. She stated that the new integration enables Meta to run its PyTorch workloads on Google TPUs effectively. Google co-developed this TorchTPU stack with Meta's engineering team to facilitate this transition. This is not the first time Meta has experimented with Google chips, but previous efforts using the older PyTorch/XLA bridge were limited to research teams between 2020 and 2023 before those contracts were canceled.

The timing of this announcement is notable. It came just one day after Amazon revealed that it was open-sourcing its own PyTorch backend for Trainium chips. Both moves appear designed to reduce the software lock-in that has historically favored Nvidia. By making their respective chips easier to use with the industry-standard PyTorch framework, Google and Amazon are lowering the barrier to entry for developers who might otherwise stick with the incumbent provider.

While the exact location of Meta's production TPUs is not public, industry reports suggest that negotiations included rentals in 2026 and purchases in 2027. Meta has reportedly signed a multi-year rental agreement as part of this deal. The performance gains are not limited to the Kimi K3 model. Tests showed that the new kernels deliver roughly 1.4 to 2 times the throughput of the Nvidia baseline at small batch sizes for other models like Qwen 3.8 27B.

The ecosystem is expected to expand rapidly. SGLang-TorchTPU plans to add support for new models starting with DeepSeek V4.1 Flash and Reflection Beam. The teams aim to achieve Day 0 support for new open models by the first quarter of 2027. Further details will be shared at the SGLang Summit 2026, scheduled for November 12 and 13 in San Francisco, where Google, Meta, and RadixArk will present their joint roadmap.